Re: [oopic] Re: Angle of attack VII - any help appreciated

Okidoki,

Locally (and cheaply) I can get the 74HC160 Synchronous Decimal
Up/Down Counter - http://www.jaycar.co.nz/products_uploaded/ZC4855.pdf
- It seems to be the same chip aside from the fact it is BCD and not
the full 2^4 bits

Now if I'm understanding correctly it should work fine but I need a
different setup of logic doohickeys for the reset and 13th(12th)
outputs ?

Either that or maybe:
http://www.jaycar.co.nz/products_uploaded/ZC4864.pdf - which is a
different beast but in the same ballpark ?

youch ;)
Nick

On 7/20/07, ooPIC Tech Support <dennis.clark@oopic.com> wrote:
> Actually, if you want a good "for newbies" kind of logic book get the
> old tried and true "TTL Cookbook". This has been around for 25+ years,
> but it will get you going on discrete logic.
>
> DLC
>
> Nick Mulder wrote:
> > Just reading up on the part ...
> >
> > Still way behind you in terms of knowing this stuff - really need to
> > read up on the basics - logic gates, JK flip flops and the like ...
> >
> > I'll get down to nutting it out shortly - suspect I'll need to turn
> > down the music and draw me a picture with bunnywabbits, truth tables
> > etc...
> >
> > Damn spec sheets are written *too efficiently* for me - nothing but
> > the required info huh, no '74LS163 for dummies' or 'rtstofer for
> > dummies' for that matter ;)
> >
> > cheers for the update, imagine I would have been quite confused without it !
> > Nick
> >
> > On 7/20/07, rtstofer <rstofer@pacbell.net> wrote:
> >
> >>--- In oopic@yahoogroups.com, "rtstofer" <rstofer@...> wrote:
> >>
> >>>If you use a counter with a synchronous reset (reset occurs at clock
> >>>edge) then things get a lot easier.
> >>>
> >>>Consider 2 74LS163 4 bit synchronous counters. Clock both together.
> >>>Connect the Ripple Carry Output of the low order counter to the Enable
> >>>T input of the high order counter. Ground the Enable T input of the
> >>>low order counter. Ground all the Data inputs, the Enable P inputs
> >>>and the Load inputs.
> >>>
> >>>Now, decode Q4 (the low order bit of the high order counter) AND Q3
> >>>(the high order bit of the low order counter) as a count of 24 and run
> >>>that to the Reset input. The counters will now count 0..24.
> >>>
> >>>Since you have decoded the 25th count (count = 24) all you have to do
> >>>is decode the 13th count (0..12) so: AND together Q3 and Q2 (the high
> >>>two bits of the low order counter).
> >>
> >>OOPS! The count of 24 will last for 1 clock because the counter
> >>resets but the count of 12 will last a lot longer - 4 clocks.
> >>
> >>The proper decode for count = 12 (13th pulse) is Q3 AND Q2 AND (Q1 NOR
> >>Q0).
> >>
> >>
> >>>Richard
> >>>
> >>
> >>
> >>
> >>
> >>
> >>Yahoo! Groups Links
> >>
> >>
> >>
> >>
> >
> >
> >
> >
> > Yahoo! Groups Links
> >
> >
> >
>
> --
> ------------------------------------------------------
> Dennis Clark ooPIC Tech Support
> www.oopic.com
> ------------------------------------------------------
>
>
>
> Yahoo! Groups Links
>
>
>
>

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